An LUT based RNS FIR filter implementation for reconfigurable applications
暂无分享,去创建一个
[1] Chip-Hong Chang,et al. A Reconfigurable Multi-Modulus Modulo Multiplier , 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.
[2] A. Nannarelli,et al. A Hybrid RNS Adaptive Filter for Channel Equalization , 2006, 2006 Fortieth Asilomar Conference on Signals, Systems and Computers.
[3] Jie Zhang,et al. A high-speed, programmable, CSD coefficient FIR filter , 2002, IEEE Trans. Consumer Electron..
[4] Chin-Liang Wang. New bit-serial VLSI implementation of RNS FIR digital filters , 1994 .
[5] O. Vainio,et al. Comparison of programmable FIR filter architectures for low power , 2002, Proceedings of the 28th European Solid-State Circuits Conference.
[6] Joseph Mitola,et al. The software radio architecture , 1995, IEEE Commun. Mag..
[7] A. Prasad Vinod,et al. Low power and high-speed implementation of fir filters for software defined radio receivers , 2006, IEEE Transactions on Wireless Communications.
[8] Tzi-Dar Chiueh,et al. A Low-Power Digit-Based Reconfigurable FIR Filter , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.
[9] Vidosav Stojanovic,et al. Digital filter implementation based on the RNS with diminished-1 encoded channel , 2012, 2012 35th International Conference on Telecommunications and Signal Processing (TSP).
[10] K.G. Smitha,et al. A reconfigurable high-speed RNS-FIR channel filter for multi-standard software radio receivers , 2008, 2008 11th IEEE Singapore International Conference on Communication Systems.
[11] W. Kenneth Jenkins,et al. The use of residue number systems in the design of finite impulse response digital filters , 1977 .
[12] Wei Zhang,et al. A New RNS based DA Approach for Inner Product Computation , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.
[13] G.C. Cardarilli,et al. Residue number system reconfigurable datapath , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).
[14] Dong Shi,et al. Design of Linear Phase FIR Filters With High Probability of Achieving Minimum Number of Adders , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.
[15] Richard Conway,et al. Improved RNS FIR filter architectures , 2004, IEEE Transactions on Circuits and Systems II: Express Briefs.
[16] M. Soderstrand,et al. VLSI implementation in multiple-valued logic of an FIR digital filter using residue number system arithmetic , 1986 .
[17] P. V. Mohan,et al. Residue Number Systems: Algorithms and Architectures , 2011 .
[18] P. V. Ananda Mohan,et al. RNS-To-Binary Converter for a New Three-Moduli Set $\{2^{{n}+1}-1,2^{n},2^{n}-1\}$ , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.