Novel Digital Control Architecture with Non-Linear Control Algorithms Exhibiting Very Fast Transient Response

A dual-voltage-loop digital control architecture with non-linear control algorithm is proposed in this paper. An adaptive voltage positioning (AVP) control unit was generalized to achieve adaptive voltage positioning, by generating dynamic voltage reference and dynamic current reference. A dynamic reference step adjustment method lowers the high speed requirement of reference updating clock; a non-linear control minimizes the transient-assertion-to-action delay and maximizes the inductor current slew rate; and a transient detection circuit recognizes the load transient state in a manner adaptive to the amount and slew rate of load current transient. Theoretical, simulation and experimental results prove the effective operation and excellent dynamic performance of the digital controller.

[1]  R. Redl,et al.  Optimizing the load transient response of the buck converter , 1998, APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition.

[2]  R. Miftakhutdinov Optimal design of interleaved synchronous buck converter at high slew-rate load current transients , 2001, 2001 IEEE 32nd Annual Power Electronics Specialists Conference (IEEE Cat. No.01CH37230).

[3]  S. A. Chickamenahalli,et al.  Effect of target impedance and control loop design on VRM stability , 2002, APEC. Seventeenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.02CH37335).

[4]  F. C. Lee,et al.  VRM transient study and output filter design for future processors , 1998, IECON '98. Proceedings of the 24th Annual Conference of the IEEE Industrial Electronics Society (Cat. No.98CH36200).

[5]  Seth R. Sanders,et al.  Architecture and IC implementation of a digital VRM controller , 2003 .

[6]  Jianping Xu,et al.  The effects of control techniques on the transient response of switching DC-DC converters , 1999, Proceedings of the IEEE 1999 International Conference on Power Electronics and Drive Systems. PEDS'99 (Cat. No.99TH8475).

[7]  R. Miftakhutdinov,et al.  Analysis and optimization of synchronous buck converter at high slew-rate load current transients , 2000, 2000 IEEE 31st Annual Power Electronics Specialists Conference. Conference Proceedings (Cat. No.00CH37018).

[8]  F.C. Lee,et al.  Critical bandwidth for the load transient response of voltage regulator modules , 2004, IEEE Transactions on Power Electronics.

[9]  A.Q. Huang,et al.  A novel VRM control with direct load current feedback , 2004, Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04..

[10]  Fred C. Lee,et al.  Design considerations for VRM transient response based on the output impedance , 2003 .

[11]  A. Lazaro,et al.  Bandwidth and Dynamic Response Decoupling in a Multi-phase VRM by applying Linear-Non-Linear Control , 2007, 2007 IEEE International Symposium on Industrial Electronics.

[12]  S. Saggini,et al.  An innovative digital control architecture for low-Voltage, high-current DC-DC converters with tight voltage regulation , 2004, IEEE Transactions on Power Electronics.

[13]  Issa Batarseh,et al.  A multiphase DC/DC converter with hysteretic voltage control and current sharing , 2002, APEC. Seventeenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.02CH37335).

[14]  Peng Xu,et al.  Critical inductance in voltage regulator modules , 2002, APEC. Seventeenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.02CH37335).