Efficient validity checking for processor verification
暂无分享,去创建一个
[1] Robert E. Shostak,et al. A Practical Decision Procedure for Arithmetic with Function Symbols , 1979, JACM.
[2] Anoop Gupta,et al. The Stanford FLASH Multiprocessor , 1994, ISCA.
[3] Greg Nelson,et al. Fast Decision Procedures Based on Congruence Closure , 1980, JACM.
[4] Robert E. Tarjan,et al. Efficiency of a Good But Not Linear Set Union Algorithm , 1972, JACM.
[5] Mark Bickford,et al. Formal verification of a pipelined microprocessor , 1990, IEEE Software.
[6] Greg Nelson,et al. Simplification by Cooperating Decision Procedures , 1979, TOPL.
[7] David A. Patterson,et al. Computer Architecture: A Quantitative Approach , 1969 .
[8] D. Beatty. A methodology for formal hardware verification, with application to microprocessors , 1993 .
[9] David L. Dill,et al. Automatic verification of Pipelined Microprocessor Control , 1994, CAV.
[10] Ronald L. Rivest,et al. Introduction to Algorithms , 1990 .
[11] M. K. Srivas,et al. Applying formal verification to a commercial microprocessor , 1995, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair.
[12] H. De Man,et al. Correctness verification of VLSI modules supported by a very efficient Boolean prover , 1989, Proceedings 1989 IEEE International Conference on Computer Design: VLSI in Computers and Processors.
[13] Charles Gregory Nelson,et al. Techniques for program verification , 1979 .
[14] Srinivas Devadas,et al. Automatic Verification of Pipelined Microprocessors , 1994, 31st Design Automation Conference.
[15] Phillip J. Windley. Formal Modeling and Verification of Microprocessors , 1995, IEEE Trans. Computers.