The next generation of CCD imagers will undoubtedly be mosaics, in order to overcome (1) the low yield when fabricating large devices, (2) the limited number of readout channels that can be put easily on a single CCD, and (3) the physical limitation of the 4-inch silicon wafer. As a first step towards a 8192 x 8192 CCD mosaic, we have recently fabricated a 2 x 2 array of Loral 2048 x 2048 CCDs. The two-side buttable design of these chips (by John Geary of SAO) allows us to achieve gaps of about 0.6 mm (40 pixels). This prototype mini-mosaic imager, using unthinned, front-illuminated CCDs has been used at the KPNO 0.9 m and 4 m telescopes. As we are constructing a number of scientific-grade mosaics with thinned chips for use at KPNO and CTIO, we are beginning the design and fabrication work for an 8192 x 8192 imager. This will be a 2 x 4 array of Loral 4096 x 2048 CCDs with interchip spacing of less than 0.5 mm. Such a device will have a physical size of approximately 5 inches square and will cover an area of 38.6 (59.1) arcminutes on an edge at the 4 m (0.9 m) telescope with a pixel size of 0.28 (0.43) arcseconds per pixel. This paper discusses results obtained with the 4096 x 4096 minimosaic and design strategies/progress on the larger 8192 x 8192 imager. Specifically, we present designs of the Dewar and mechanical interface for the large mosaic, a physical mounting scheme which will achieve better than 5 micron RMS flatness, and a discussion of the electronics and controller (the CTIO transputer-based ARCON), which will allow us to read out the entire array in less than two minutes. Some strategies for dealing with the large amount of data (128 Megabytes per image) will be presented.