Model Checking Flat Freeze LTL on One-Counter Automata

Freeze LTL is a temporal logic with registers that is suitable for specifying properties of data words. In this paper we study the model checking problem for Freeze LTL on one-counter automata. This problem is known to be undecidable in full generality and PSPACE-complete for the special case of deterministic one-counter automata. Several years ago, Demri and Sangnier investigated the model checking problem for the flat fragment of Freeze LTL on several classes of counter automata and posed the decidability of model checking flat Freeze LTL on one-counter automata as an open problem. In this paper we resolve this problem positively, utilising a known reduction to a reachability problem on one-counter automata with parameterised equality and disequality tests. Our main technical contribution is to show decidability of the latter problem by translation to Presburger arithmetic.

[1]  Stéphane Demri,et al.  On the freeze quantifier in constraint LTL: decidability and complexity , 2005, 12th International Symposium on Temporal Representation and Reasoning (TIME'05).

[2]  Grégoire Sutre,et al.  Flat Counter Automata Almost Everywhere! , 2005, ATVA.

[3]  Stéphane Demri,et al.  When Model-Checking Freeze LTL over Counter Machines Becomes Decidable , 2010, FoSSaCS.

[4]  Tao Jiang,et al.  New Decidability Results Concerning Two-way Counter Machines and Applications , 1993, ICALP.

[5]  Tim French Quantified propositional temporal logic with repeating states , 2003, 10th International Symposium on Temporal Representation and Reasoning, 2003 and Fourth International Conference on Temporal Logic. Proceedings..

[6]  John Fearnley,et al.  Reachability in two-clock timed automata is PSPACE-complete , 2013, Inf. Comput..

[7]  Véronique Cortier,et al.  Flatness Is Not a Weakness , 2000, CSL.

[8]  Joël Ouaknine,et al.  Reachability in Succinct and Parametric One-Counter Automata , 2009, CONCUR.

[9]  Joël Ouaknine,et al.  On Expressiveness and Complexity in Real-Time Model Checking , 2008, ICALP.

[10]  Stéphane Demri,et al.  Model checking memoryful linear-time logics over one-counter automata , 2010, Theor. Comput. Sci..

[11]  Stéphane Demri,et al.  LTL with the Freeze Quantifier and Register Automata , 2006, 21st Annual IEEE Symposium on Logic in Computer Science (LICS'06).

[12]  Stéphane Demri,et al.  Model Checking Freeze LTL over One-Counter Automata , 2008, FoSSaCS.

[13]  Igor Potapov,et al.  Temporal logic with predicate /spl lambda/-abstraction , 2005, 12th International Symposium on Temporal Representation and Reasoning (TIME'05).