RNS-to-Binary Converters for New Three-Moduli Sets {2k-3, 2k-2, 2k-1} and {2k+1, 2k+2, 2k+3}

In this paper, mixed radix conversion (MRC)-based residue number system (RNS)-to-binary converters for two new three-moduli sets {2k−3, 2k−2, 2k−1} and {2k+1, 2k+2, 2k+3} which are derived from the...

[1]  S. Andraos,et al.  A new efficient memoryless residue to binary converter , 1988 .

[2]  Ahmad A. Hiasat,et al.  VLSI implementation of new arithmetic residue to binary decoders , 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[3]  Chip-Hong Chang,et al.  An efficient reverse converter for the 4-moduli set {2/sup n/ - 1, 2/sup n/, 2/sup n/ + 1, 2/sup 2n/ + 1} based on the new Chinese remainder theorem , 2003 .

[4]  S. Piestrak.  A high-speed realization of a residue to binary number system converter , 1995 .

[5]  E. Swartzlander.  Merged Arithmetic , 1980, IEEE Transactions on Computers.

[6]  Hong Shen,et al.  Adder based residue to binary number converters for (2n-1, 2n, 2n+1) , 2002, IEEE Trans. Signal Process..

[7]  Yuke Wang.  Residue-to-binary converters based on new Chinese remainder theorems , 2000 .

[8]  A. Hiasat,et al.  Residue-to-binary arithmetic converter for the moduli set (2/sup k/, 2/sup k/-1, 2/sup k-1/-1) , 1998 .

[9]  T. Srikanthan,et al.  High-speed and low-cost reverse converters for the (2n-1, 2n, 2n+1) moduli set , 1998 .

[10]  Wei Wang,et al.  A note on "A high-speed residue-to-binary converter for three-moduli (2/sup k/ 2/sup k/ - 1, 2/sup k-1/ - 1) RNS and a scheme for its VLSI implementation" , 2000 .

[11]  M.N.S. Swamy,et al.  Residue-to-binary number converters for three moduli sets , 1999 .

[12]  Sorin Cotofana,et al.  An Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set $\{2n+1,2n,2n-1\}$ , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[13]  Wei Wang,et al.  A note on "A high-speed residue-to-binary converter for three-moduli (2 k 2 k - 1, 2 k-1 - 1) RNS and a scheme for its VLSI implementation" , 2002 .

[14]  A. Premkumar.  An RNS to binary converter in a three moduli set with common factors , 1995 .

[15]  A. B. Premkumar,et al.  An RNS to binary converter in 2n+1, 2n, 2n-1 moduli set , 1992 .

[16]  Lu Zhou,et al.  High-speed modulo (2n+3) multipliers , 2013, IEICE Electron. Express.

[17]  A. Dhurkadas.  Comments on "A high speed realization of a residue to binary number system converter" , 1998 .

[18]  T. Srikanthan,et al.  Breaking the 2n-bit carry propagation barrier in residue to binary conversion for the [2/sup n/-1, 2/sup n/, 2/sup n/+1] modula set , 1998 .

[19]  P. V. Ananda Mohan.  Efficient Design of Binary to RNS Converters , 1999, J. Circuits Syst. Comput..

[20]  G. Jullien,et al.  An improved residue-to-binary converter , 2000 .

[21]  P. V. Ananda Mohan.  Reverse Conversion Using Core Function, CRT and Mixed Radix Conversion , 2017, Circuits Syst. Signal Process..