Standard cell interconnect length prediction from structural circuit attributes

A new interconnect model is proposed that predicts the distribution parameters of net lengths. The model takes as input a standard cell netlist and provides as output estimates of the mean and variance offer length on a net by net basis. The model was developed and verified on designs produced with two different place and route algorithms.

[1]  William E. Donath,et al.  Placement and average interconnection lengths of computer logic , 1979 .

[2]  Jacob A. Abraham,et al.  Average Interconnection Length and Interconnection Distribution Based on Rent's Rule , 1989, 26th ACM/IEEE Design Automation Conference.

[3]  W. Donath Wire length distribution for placements of computer logic , 1981 .

[4]  Roy L. Russo,et al.  On a Pin Versus Block Relationship For Partitions of Logic Graphs , 1971, IEEE Transactions on Computers.

[5]  Michael Feuer Connectivity of Random Logic , 1982, IEEE Transactions on Computers.

[6]  Massoud Pedram,et al.  Interconnection length estimation for optimized standard cell layouts , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[7]  Chung-Kuan Cheng,et al.  A wire length estimation technique utilizing neighborhood density equations , 1992, DAC '92.

[8]  H. B. Bakoglu,et al.  Circuits, interconnections, and packaging for VLSI , 1990 .

[9]  Hans Jürgen Prömel,et al.  Finding clusters in VLSI circuits , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[10]  Phillip Christie,et al.  The analytical form of the length distribution function for computer interconnection , 1991 .

[11]  Wojciech Maly,et al.  Manufacturability analysis environment-MAPEX , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[12]  Massoud Pedram,et al.  Accurate prediction of physical design characteristics for random logic , 1989, Proceedings 1989 IEEE International Conference on Computer Design: VLSI in Computers and Processors.