15.1 An 85dB-DR 74.6dB-SNDR 50MHZ-BW CT MASH ΔΣ modulator in 28nm CMOS

A multi-stage noise-shaping (MASH) architecture is an attractive approach for its aggressive noise-shaping capability and relaxed stability requirements. However, in practice the quantization noise leakage associated with the mismatch between analog and digital transfer functions degrades performance significantly. The discrete-time (DT) Sturdy-MASH (SMASH) architecture avoids this problem, and promises a higher performance potential [1]. Although straightforward in DT implementation, the SMASH architecture poses challenges in continuous-time (CT) implementation demanded by high-bandwidth applications. This paper presents a 3-1 CT MASH A2 modulator to address these challenges. The modulator is clocked at 1.8GHz and achieves 85dB DR, 85.2dBc SFDR, and 74.6dB SNDR at a 50MHz BW.

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