A Thermally Stable and High-Performance 90-nm ${\rm Al}_{2}{\rm O}_{3}\backslash{\rm Cu}$-Based 1T1R CBRAM Cell

In this paper, we optimize the stack of a 90-nm CMOS-friendly W\Al₂O₃\Cu conductive-bridging random access memory cell integrated in the one-transistor/one-resistor configuration. We show that the excellent Cu buffering properties of a TiW layer inserted at the Al₂O₃\Cu interface make it possible, on one hand, to ensure cell integrity after back-end-of-line processing at 400 °C and, on the other, to obtain excellent memory performances. After optimization of the Al₂O₃ layer thickness, the cell exhibits highly controlled set and reset operations, a large memory window, fast pulse programming (0 ns) at low voltage (<;3 V), and low-current (10 μA), and multilevel operation. Finally, 10⁶ cycles of write endurance lifetime with up to a three-decade memory window is demonstrated, and state stability is assessed up to 125 °C.