Parallelized generation of ZC/ZC-DFT sequences in vector DSP

A parallelized generation of Zadoff-Chu (ZC) and the Discrete Fourier Transform of Zadoff-Chu (ZC-DFT) sequences is proposed. In this algorithm, the sampling operation is completely eliminated for the ZC-DFT sequences generation. Implemented on a vector Digital Signal Processor (DSP), the proposed algorithm makes an efficient use of the parallel DSP structure and achieves a high computing speed, owing to the decomposition of the root index. Since only a few “seed sequences” are required, the proposed algorithm obtains an extremely low memory requirement and a high precision.

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