论文信息 - Fully-depleted SOI devices with TaSiN gate, HfO2 gate dielectric, and elevated source/drain extensions

Fully-depleted SOI devices with TaSiN gate, HfO2 gate dielectric, and elevated source/drain extensions

We report for the first time the performance of ultrathin film fully-depleted (FD) silicon-on-insulator (SOI) CMOS transistors using HfO/sub 2/ gate dielectric and TaSiN gate material. The transistors feature 100-150 /spl Aring/ silicon film thickness and selective epitaxial silicon growth in the source/drain extension regions. TaSiN-gate shows good threshold voltage control using an undoped channel, which reduces threshold voltage variation with silicon film thickness and discrete, random dopant placement. Device processing for CMOS fabrication is drastically simplified by the use of the same gate material for both n- and p-MOSFETs. Electrical characterization results illustrate the combined impact of using high-k dielectric and metal gate on the performance of ultrathin film FD SOI devices.

[1] R. Koh. Buried Layer Engineering to Reduce the Drain-Induced Barrier Lowering of Sub-0.05 µm SOI-MOSFET , 1999 .

[2] A. Vandooren,et al. Ultra-thin body fully-depleted SOI devices with metal gate (TaSiN) gate, high K (HfO/sub 2/) dielectric and elevated source/drain extensions , 2002, 2002 IEEE International SOI Conference.

[3] J. Chen,et al. A CV technique for measuring thin SOI film thickness , 1991, IEEE Electron Device Letters.

[4] Gerard Ghibaudo,et al. New method for the extraction of MOSFET parameters , 1988 .

[5] Dimitri A. Antoniadis,et al. SOI MOSFET effective channel mobility , 1994 .

[6] Tadahiro Ohmi,et al. Tantalum-gate thin-film SOI nMOS and pMOS for low-power applications , 1997 .

[7] Sorin Cristoloveanu,et al. Influence of series resistances and interface coupling on the transconductance of fully-depleted silicon-on-insulator MOSFETs , 1992 .

[8] H. Tango,et al. Two-dimensional simulation and measurement of high-performance MOSFETs made on a very thin SOI film , 1989 .

[9] J. Chen,et al. 0.18 /spl mu/m metal gate fully-depleted SOI MOSFETs for advanced CMOS applications , 1999, 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325).