System Modeling and Design Refinement in ForSyDe

Advances in microelectronics allow the integration of more andmore functionality on a single chip. Emerging system-on-a-chiparchitectures include a large amount of heterogeneous componentsand are of increasing complexity. Applications using thesearchitectures require many low-level details in order to yield anefficient implementation. On the other hand constanttime-to-market pressure on electronic systems demands a shortdesign process that allows to model a system at a highabstraction level, not taking low-level implementation detailsinto account. Clearly there is a significant abstraction gapbetween an ideal model for specification and another one forimplementation. This abstraction gap has to be addressed bymethodologies for electronic system design.This thesis presents the ForSyDe (Formal System Design)methodology, which has been developed with the objective to movesystem design to a higher level of abstraction and to bridge theabstraction gap by transformational design refinement. ForSyDe isbased on carefully selected formal foundations. The initialspecification model uses a synchronous model of computation,which separates communication from computation and has anabstract notion of time. ForSyDe uses the concept of processconstructors to implement the synchronous model, to allow fordesign transformation and the mapping of a refined model onto thetarget architecture. The specification model is refined into adetailed implementation model by the stepwise application ofwell-defined design transformation rules. These rules are eithersemantic preserving or they inflict a design decision modifyingthe semantics. These design decisions are used to introduce thelow-level implementation details that are needed for an efficientimplementation. The implementation model is mapped onto thecomponents of the target architecture. At present ForSyDe modelscan be mapped onto VHDL or C/C++ in order to allow commercialtools to generate custom hardware or sequential software. Thethesis uses a digital equalizer to illustrate the concepts andpotential of ForSyDe.Electronic System Design, Hardware/Software Co-Design,Electrical Engineering

[1]  Nicolas Halbwachs,et al.  Validation of Synchronous Reactive Systems: From Formal Verification to Automatic Testing , 1999, ASIAN.

[2]  Alberto L. Sangiovanni-Vincentelli,et al.  System-level design: orthogonalization of concerns andplatform-based design , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Jeroen Voeten,et al.  On the fundamental limitations of transformational design , 2001, TODE.

[4]  Bjarne Stroustrup,et al.  C++ Programming Language , 1986, IEEE Softw..

[5]  Richard Sharp,et al.  Hardware/Software Co-Design Using Functional Languages , 2001, TACAS.

[6]  Christos G. Cassandras,et al.  Discrete event systems : modeling and performance analysis , 1993 .

[7]  Friedrich L. Bauer,et al.  Formal Program Construction by Transformations-Computer-Aided, Intuition-Guided Programming , 1989, IEEE Trans. Software Eng..

[8]  Edward A. Lee,et al.  Hierarchical finite state machines with multiple concurrency models , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[9]  Axel Jantsch,et al.  Transformational System Design based on a Formal Computational Model and Skeletons , 2000 .

[10]  Yervant Zorian,et al.  2001 Technology Roadmap for Semiconductors , 2002, Computer.

[11]  Luciano Lavagno,et al.  Hardware-software co-design of embedded systems: the POLIS approach , 1997 .

[12]  Mary Sheeran,et al.  Lava: hardware design in Haskell , 1998, ICFP '98.

[13]  Axel Jantsch,et al.  System modeling and transformational design refinement in ForSyDe [formal system design] , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[14]  Robin Milner,et al.  A Theory of Type Polymorphism in Programming , 1978, J. Comput. Syst. Sci..

[15]  G. Winskel.  The formal semantics of programming languages , 1993 .

[16]  Edward A. Lee,et al.  Taming heterogeneity - the Ptolemy approach , 2003, Proc. IEEE.

[17]  Simon Thompson,et al.  Haskell: The Craft of Functional Programming , 1996 .

[18]  Daniel Gajski,et al.  Introduction to high-level synthesis , 1994, IEEE Design & Test of Computers.

[19]  Wayne Luk,et al.  Towards a declarative framework for hardware-software codesign , 1994, CODES.

[20]  Axel Jantsch,et al.  Comparison of Six Languages for System Level Descriptions of Telecom Systems , 1998 .

[21]  John J. O'Donnell.  From Transistors to Computer Architecture: Teaching Functional Circuit Specification in Hydra , 1995, FPLE.

[22]  Robin Milner,et al.  A Metalanguage for interactive proof in LCF , 1978, POPL.

[23]  Robin Milner,et al.  Communication and concurrency , 1989, PHI Series in computer science.

[24]  David Harel,et al.  Statecharts: A Visual Formalism for Complex Systems , 1987, Sci. Comput. Program..

[25]  Stephen A. Edwards,et al.  The synchronous languages 12 years later , 2003, Proc. IEEE.

[26]  E.A. Lee,et al.  Synchronous data flow , 1987, Proceedings of the IEEE.

[27]  Edward A. Lee,et al.  A framework for comparing models of computation , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[28]  Paul Hudak,et al.  Event-Driven FRP , 2002, PADL.

[29]  Robin Milner,et al.  A Calculus of Communicating Systems , 1980, Lecture Notes in Computer Science.

[30]  Luciano Lavagno,et al.  Synchronous approach to the functional equivalence of embeddedsystem implementations , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[31]  Duane C. Hanselman,et al.  Mastering MATLAB 5: A Comprehensive Tutorial and Reference , 1995 .

[32]  Richard S. Bird,et al.  Lectures on Constructive Functional Programming , 1989 .

[33]  Gilles Kahn,et al.  Coroutines and Networks of Parallel Processes , 1977, IFIP Congress.

[34]  Edward A. Lee,et al.  Dataflow process networks , 1995, Proc. IEEE.

[35]  Sharad Malik,et al.  Developing Architectural Platforms: A Disciplined Approach , 2002, IEEE Des. Test Comput..

[36]  A. Hugo.  A Hardware Implementation of Pure Esterel , 1991 .

[37]  Paul Hudak,et al.  Real-time FRP , 2001, ICFP '01.

[38]  Nicolas Halbwachs,et al.  Implementing Reactive Programs on Circuits: A Hardware Implementation of LUSTRE , 1991, REX Workshop.

[39]  Nicolas Halbwachs,et al.  Synchronous Programming of Reactive Systems , 1992, CAV.

[40]  Gérard Berry,et al.  The Esterel Synchronous Programming Language: Design, Semantics, Implementation , 1992, Sci. Comput. Program..

[41]  Pascal Raymond,et al.  The synchronous data flow programming language LUSTRE , 1991, Proc. IEEE.

[42]  Daniel D. Gajski,et al.  SpecC Methodology for High-Level Modeling , 2002 .

[43]  Luciano Lavagno,et al.  Synthesis of Software Programs for Embedded Control Applications , 1999, 32nd Design Automation Conference.

[44]  Jörg Henkel,et al.  Hardware-software cosynthesis for microcontrollers , 1993, IEEE Design & Test of Computers.

[45]  Paul Hudak,et al.  A gentle introduction to Haskell , 1992, SIGP.

[46]  Thierry Gautier,et al.  Programming real-time applications with SIGNAL , 1991, Proc. IEEE.

[47]  Axel Jantsch,et al.  Transformation based communication and clock domain refinement for system design , 2002, DAC '02.

[48]  Albert Benveniste,et al.  The synchronous approach to reactive and real-time systems , 1991 .

[49]  Stephen A. Dyer,et al.  Digital signal processing , 2018, 8th International Multitopic Conference, 2004. Proceedings of INMIC 2004..

[50]  Helmut A. Partsch,et al.  Specification and transformation of programs , 1990 .

[51]  Jürgen Teich,et al.  FunState-an internal design representation for codesign , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

[52]  Giovanni De Micheli,et al.  Synthesis and Optimization of Digital Circuits , 1994 .

[53]  Dieter Hogrefe,et al.  SDL : formal object-oriented language for communicating systems , 1997 .

[54]  Minh N. Do,et al.  Youn-Long Steve Lin , 1992 .

[55]  Edward A. Lee,et al.  Overview of the Ptolemy project , 2001 .

[56]  Giovanni De Micheli,et al.  Readings in hardware / software co-design , 2001 .

[57]  Alberto L. Sangiovanni-Vincentelli,et al.  Addressing the system-on-a-chip interconnect woes through communication-based design , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[58]  John Hughes,et al.  Why Functional Programming Matters , 1989, Comput. J..

[59]  Stephen A. Edwards,et al.  Design of embedded systems: formal models, validation, and synthesis , 1997, Proc. IEEE.

[60]  Rolf Ernst,et al.  Codesign of Embedded Systems: Status and Trends , 1998, IEEE Des. Test Comput..

[61]  John Launchbury,et al.  Microprocessor specification in Hawk , 1998, Proceedings of the 1998 International Conference on Computer Languages (Cat. No.98CB36225).

[62]  Edward A. Lee,et al.  What's Ahead for Embedded Software? , 2000, Computer.

[63]  Axel Jantsch,et al.  A case study of hardware and software synthesis in ForSyDe , 2002, 15th International Symposium on System Synthesis, 2002..

[64]  C. A. R. Hoare,et al.  Communicating sequential processes , 1978, CACM.

[65]  Edward A. Lee,et al.  Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing , 1989, IEEE Transactions on Computers.

[66]  Paul Hudak,et al.  Conception, evolution, and application of functional programming languages , 1989, CSUR.

[67]  Axel Jantsch,et al.  MASCOT: a specification and cosimulation method integrating data and control flow , 2000, DATE '00.

[68]  David B. Skillicorn,et al.  Models and languages for parallel computation , 1998, CSUR.

[69]  Miriam Leeser,et al.  HML, a novel hardware description language and its translation to VHDL , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[70]  G.E. Moore,et al.  Cramming More Components Onto Integrated Circuits , 1998, Proceedings of the IEEE.

[71]  Axel Jantsch,et al.  System synthesis utilizing a layered functional model , 1999, CODES '99.

[72]  Koen Claessen.  Embedded Languages for Describing and Verifying Hardware , 2001 .

[73]  Gérard Berry,et al.  The foundations of Esterel , 2000, Proof, Language, and Interaction.

[74]  Wayne Wolf,et al.  Hardware-software co-design of embedded systems , 1994, Proc. IEEE.

[75]  Axel Jantsch,et al.  System synthesis based on a formal computational model and skeletons , 1999, Proceedings. IEEE Computer Society Workshop on VLSI '99. System Design: Towards System-on-a-Chip Paradigm.

[76]  Gérard Berry,et al.  The constructive semantics of pure esterel , 1996 .

[77]  Paul Hudak,et al.  Functional reactive programming from first principles , 2000, PLDI '00.

[78]  Murray Cole,et al.  Algorithmic Skeletons: Structured Management of Parallel Computation , 1989 .

[79]  Giovanni De Micheli,et al.  Hardware-software cosynthesis for digital systems , 1993, IEEE Design & Test of Computers.

[80]  Axel Jantsch,et al.  Formal system design based on the synchrony hypothesis, functional models, and skeletons , 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

[81]  Zhonghai Lu.  Refinement of a system specification for a digital equalizer into HW and SW implementations , 2001 .

[82]  Richard Sharp,et al.  A Higher-Level Language for Hardware Synthesis , 2001, CHARME.

[83]  Jürgen Teich,et al.  SPI - a system model for heterogeneously specified embedded systems , 2002, IEEE Trans. Very Large Scale Integr. Syst..

[84]  Axel Jantsch,et al.  Modeling of mixed control and dataflow systems in MASCOT , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[85]  Gérard Berry,et al.  Real Time Programming: Special Purpose or General Purpose Languages , 1989, IFIP Congress.

[86]  Axel Jantsch,et al.  Development and application of design transformations in ForSyDe [high level synthesis] , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[87]  Frédéric Boussinot,et al.  The ESTEREL language , 1991, Proc. IEEE.

[88]  David B. Skillicorn,et al.  Foundations of parallel programming , 1995 .

[89]  Gilles Kahn,et al.  The Semantics of a Simple Language for Parallel Programming , 1974, IFIP Congress.

[90]  Rajesh Gupta,et al.  Hardware/software co-design , 1996, Proc. IEEE.

[91]  Axel Jantsch,et al.  On the roles of functions and objects in system specification , 2000, Proceedings of the Eighth International Workshop on Hardware/Software Codesign. CODES 2000 (IEEE Cat. No.00TH8518).

[92]  Axel Jantsch,et al.  Composite signal flow: a computational model combining events, sampled streams, and vectors , 2000, DATE '00.

[93]  Johnny Öberg,et al.  Grammar-based hardware synthesis from port-size independent specifications , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[94]  Axel Jantsch,et al.  The usage of stochastic processes in embedded system specifications , 2001, Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571).

[95]  Richard S. Bird,et al.  An introduction to the theory of lists , 1987 .

[96]  Thorsten Grotker,et al.  System Design with SystemC , 2002 .

[97]  Kenneth E. Iverson,et al.  A programming language , 1899, AIEE-IRE '62 (Spring).

[98]  Alberto Pettorossi,et al.  Rules and strategies for transforming functional and logic programs , 1996, CSUR.