- 1-On Performance , Transistor Count and Chip Space Assessment of Multimedia-enhanced Simultaneous Multithreaded Processors

This paper gives a cost/benefit analysis of simultaneous multithreaded (SMT) processors with multimedia enhancements. We carefully assess performance, transistor count and chip space of each simulated processor model. We focus our investigations on three different sets of processor configurations: One set with an abundance of resources, a second set with a more realistic memory hierarchy, and a third set with contemporary scaled processor models. Comparing the single-threaded 8-issue models with the 4-threaded 8-issue SMT models shows that the maximum processor models require a 2% increase in transistor count and a 9% increase in chip space, but yield a threefold speedup; the models with realistic memory hierarchy require a 31% increase in transistor count and a 53% increase in chip space, but yield a nearly twofold speedup; and the contemporary scaled models require a 9% increase in transistor count and a 27% increase in chip space, resulting in a 1.5-fold speedup.

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