Crosstalk noise verification in digital designs with interconnect process variations

Interconnect parasitics are playing a significant role in design and analysis in deep sub-micron (DSM) technologies. Interconnect process variations could play a significant role in achieving predictable yield. Crosstalk noise is one of the increasingly important careabouts in DSM designs. In this paper, a practical method to analyze the crosstalk noise effects with interconnect process variations using corner-based approach is described. The results from application of this method on a large DSP design implemented in 0.18/spl mu/ technology is presented. Application of the proposed method resulted in detection of a new worst case interconnect process corner that was not included in the design methodology.

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