P^(2)CLRAF: An Pre- and Post-Silicon Cooperated Circuit Lifetime Reliability Analysis Framework

Statistical static timing analysis (SSTA) considering process variation and aging effects is usually used to analyze circuit lifetime reliability at design phase. A key challenge for statistical lifetime reliability analysis is that an accurate statistical timing model is needed to carefully model practical variation distribution as well as delay correlation. In this work, $\mbox{P}^2\mbox{CLRAF}$, a circuit lifetime reliability analysis framework is proposed. It calibrates pre-silicon SSTA result by learning the collected data from path delay testing at post-silicon timing validation phase. A neural network inside $\mbox{P}^2\mbox{CLRAF}$ is trained to learn variation distribution and delay correlation based on the statistic of path delay testing. The learned information is then fed back to SSTA to further improve the accuracy of circuit lifetime reliability analysis. Experimental results demonstrate the effectiveness of the proposed analysis framework.