A 2-V, 1.8-GHz BJT phase-locked loop

This paper describes the design of a bipolar junction transistor phase-locked loop (PLL) for /spl Sigma//spl Delta/ fractional-N frequency-synthesis applications. Implemented in a 0.8-/spl mu/m BiCMOS technology, the PLL can operate up to 1.8 GHz while consuming 225 mW of power from a single -2-V supply. The entire LC-tuned negative-resistance variable-frequency oscillator is integrated on the same chip. A differential low-voltage current-mode logic circuit configuration is used in most of the PLL's functional blocks to minimize phase jitter and achieve low-voltage operation. The multimodulus frequency divider is designed to support multibit digital modulation. The new phase and frequency detector and loop filter contain only npn transistors and resistors and thus achieve excellent resolution in phase comparison. When phase locked to a 53.4-MHz reference clock, the measured phase noise of the 16-GHz output is -91 dBc/Hz at 10-kHz offset. The frequency switching time from 1.677 to 1.797 GHz is 150 /spl mu/s. Die size is 4300/spl times/4000 /spl mu/m/sup 2/, including the passive loop filter.

[1]  T. Riley,et al.  Delta-sigma modulation in fractional-N frequency synthesis , 1993 .

[2]  M. Steyaert,et al.  A fully integrated CMOS DCS-1800 frequency synthesizer , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[3]  J. F. Parker,et al.  A 1.6-GHz CMOS PLL with on-chip loop filter , 1998, IEEE J. Solid State Circuits.

[4]  Jan Craninckx,et al.  A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-/spl mu/m CMOS , 1996 .

[5]  Wei-Zen Chen,et al.  A 2-V 2-GHz BJT variable frequency oscillator , 1997 .

[6]  P. Schvan,et al.  A balanced 1.5 GHz voltage controlled oscillator with an integrated LC resonator , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

[7]  Calvin Plett,et al.  An agile ISM band frequency synthesizer with built-in GMSK data modulation , 1998 .

[8]  B. Miller,et al.  A multiple modulator fractional divider , 1991 .

[9]  Wei-Zen Chen,et al.  A 2 V 1.6 GHz BJT phase-locked loop , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

[10]  Behzad Razavi,et al.  Design techniques for low-voltage high-speed digital bipolar circuits , 1994 .

[11]  S. Jansen,et al.  Silicon bipolar VCO family for 1.1 to 2.2 GHz with fully-integrated tank and tuning circuits , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

[12]  Michael H. Perrott,et al.  A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation , 1997, IEEE J. Solid State Circuits.

[13]  R. B. Nubling,et al.  A high-speed multimodulus HBT prescaler for frequency synthesizer applications , 1991 .