Ternary Simulation: a Reenement of Binary Functions or an Abstraction of Real-time Behaviour?

We prove the equivalence between the ternary circuit model and a notion of in-tuitionistic stabilization bounds. The results are obtained as an application of the timing interpretation of intuitionistic propositional logic presented in 12]. We show that if one takes an intensional view of the ternary model then the delays that have been abstracted away can be completely recovered. Our intensional soundness and completeness theorems imply that the extracted delays are both correct and exact; thus we have developed a framework which uniies ternary simulation and functional timing analysis. Our focus is on the combinational behaviour of gate-level circuits with feedback. 1 Motivation When a binary digital circuit, say a network composed of and, or, inv gates etc., does not contain feedback loops its static behaviour can be dealt with completely and adequately by standard Boolean two-valued analysis. However, when one is interested in delay-related phenomena such as e.g. hazards, races, glitches, or when feedback loops cannot be avoided, as e.g. in asynchronous circuits, the two-valued Boolean model is no longer adequate. The ternary model has been introduced as a natural extension of the two-valued model to analyse circuits in the presence of propagation delays and oscillations. A third value is added to give a minimum extra capacity for accommodating time-related features of real circuits, without entering the descriptive and algorithmic complexity of a full real-time analysis. Viewed as an extension of classical propositional logic the ternary model occurs already in Kleene's work on partial recursive functions 8]. As a three-valued signal algebra the ternary model was introduced by Yoeli and Rinon 15] to analyse static hazards. Eichel-berger 6] extended the method to handle general hazards in combinational circuits, and races and oscillations in sequential circuits. Later the theory and application of ternary