A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA

This work addresses the problem of information leakage of cryptographic devices, by using the reconfiguration technique allied to an RNS based arithmetic. The information leaked by circuits, like power consumption, electromagnetic emissions and time to compute may be used to find cryptographic secrets. The results issue of prototyping shows that our coarse grained reconfigurable architecture is robust against power analysis attacks.

[1]  Henk L. Muller,et al.  Cryptographic Hardware and Embedded Systems — CHES 2001 , 2001, Lecture Notes in Computer Science.

[2]  Laurent Imbert,et al.  a full RNS implementation of RSA , 2004, IEEE Transactions on Computers.

[3]  C. D. Walter,et al.  Sliding Windows Succumbs to Big Mac Attack , 2001, CHES.

[4]  JaeCheol Ha,et al.  A CRT-Based RSA Countermeasure Against Physical Cryptanalysis , 2005, HPCC.

[5]  Joos Vandewalle,et al.  Hardware implementation of a Montgomery modular multiplier in a systolic array , 2003, Proceedings International Parallel and Distributed Processing Symposium.

[6]  Christof Paar,et al.  Cryptographic Hardware and Embedded Systems - CHES 2002 , 2003, Lecture Notes in Computer Science.

[7]  Paul C. Kocher,et al.  Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems , 1996, CRYPTO.

[8]  M. McLoone,et al.  Fast Montgomery modular multiplication and RSA cryptographic processor architectures , 2003, The Thrity-Seventh Asilomar Conference on Signals, Systems & Computers, 2003.

[9]  Nadia Nedjah,et al.  A Review of Modular Multiplication Methods ands Respective Hardware Implementation , 2006, Informatica.

[10]  Laurent Imbert,et al.  Leak Resistant Arithmetic , 2004, CHES.

[11]  Luca Benini,et al.  Energy-aware design techniques for differential power analysis protection , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[12]  William P. Marnane,et al.  Efficient architectures for implementing montgomery modular multiplication and RSA modular exponentiation on reconfigurable logic , 2002, FPGA '02.

[13]  David Chaum,et al.  Security without identification: transaction systems to make big brother obsolete , 1985, CACM.

[14]  Nigel P. Smart,et al.  Instruction stream mutation for non-deterministic processors , 2002, Proceedings IEEE International Conference on Application- Specific Systems, Architectures, and Processors.

[15]  George S. Taylor,et al.  Balanced self-checking asynchronous logic for smart card applications , 2003, Microprocess. Microsystems.

[16]  Eric Peeters,et al.  Parallel FPGA implementation of RSA with residue number systems - can side-channel threats be avoided? , 2003, 2003 46th Midwest Symposium on Circuits and Systems.

[17]  Louis Goubin,et al.  A Refined Power-Analysis Attack on Elliptic Curve Cryptosystems , 2003, Public Key Cryptography.

[18]  Alfred Menezes,et al.  Topics in Cryptology – CT-RSA 2005 , 2005 .

[19]  Henk L. Muller,et al.  Non-deterministic Processors , 2001, ACISP.

[20]  Stefan Mangard,et al.  Hardware Countermeasures against DPA ? A Statistical Analysis of Their Effectiveness , 2004, CT-RSA.

[21]  Lionel Torres,et al.  A Parallel and Secure Architecture for Asymmetric Cryptography , 2006, ReCoSoC.

[22]  Adi Shamir,et al.  Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies , 2000, CHES.

[23]  Adi Shamir,et al.  A method for obtaining digital signatures and public-key cryptosystems , 1978, CACM.

[24]  Atsuko Miyaji,et al.  Efficient Countermeasures against RPA, DPA, and SPA , 2004, CHES.

[25]  Wei Zhang,et al.  Masking the energy behavior of DES encryption [smart cards] , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[26]  Bert den Boer,et al.  A DPA Attack against the Modular Reduction within a CRT Implementation of RSA , 2002, CHES.

[27]  H. Garner.  The residue number system , 1959, IRE-AIEE-ACM '59 (Western).

[28]  Christophe Clavier,et al.  Differential Power Analysis in the Presence of Hardware Countermeasures , 2000, CHES.

[29]  Jean-Sébastien Coron,et al.  Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems , 1999, CHES.

[30]  Siva Sai Yerubandi,et al.  Differential Power Analysis , 2002 .