A Research on the Methods of Forecasting and Controlling for Air Compressor

The constant pressure controlling progress of air compressor, limited by the production load and the changing of compression material flow, directly influences the condensation and separation, purification and rectification of the air, and the energy consumption of the system, is a representative time-varying system. In this paper, the coupling correlations among many parameters during the constant pressure controlling progress of air compressor are analyzed, the model of controlled autoregressive integrated moving average (CARIMA) is established, the generalized predictive control strategy based on the cascade control was proposed and had been applied successfully to the governing system of air compressor for separating copious cooling air in a factory. The result indicated that this optimized control law can efficiently eliminate the negative influence on constant pressure speed control system of air compressor by the uncertain perturbations and nonlinearity factors, enhancing control precision and dynamic qualities and reducing the system's energy consumption.

[1]  Hiroto Yasuura,et al.  A bus delay reduction technique considering crosstalk , 2000, DATE '00.

[2]  F. MacWilliams,et al.  The Theory of Error-Correcting Codes , 1977 .

[3]  T. Dumitras,et al.  Towards on-chip fault-tolerant communication , 2003, Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003..

[4]  Mani B. Srivastava,et al.  A survey of techniques for energy efficient on-chip communication , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[5]  Mehrdad Nourani,et al.  Testing SoC interconnects for signal integrity using boundary scan , 2003, Proceedings. 21st VLSI Test Symposium, 2003..

[6]  Axel Jantsch,et al.  A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip , 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).

[7]  Chu Jian.  Multivariable generalized predictive control for diagonal CARIMA model , 2006 .

[8]  Lei He,et al.  Simultaneous shield insertion and net ordering under explicit RLC noise constraint , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[9]  Luca Benini,et al.  A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[10]  C. Svensson.  Optimum voltage swing on on-chip and off-chip interconnects , 2000, Proceedings of the 26th European Solid-State Circuits Conference.

[11]  Chunjie Duan,et al.  Analysis and avoidance of cross-talk in on-chip buses , 2001, HOT 9 Interconnects. Symposium on High Performance Interconnects.

[12]  Naresh R. Shanbhag,et al.  Coding for systern-on-chip networks: a unified framework , 2004, Proceedings. 41st Design Automation Conference, 2004..

[13]  Massoud Pedram,et al.  Power Aware Design Methodologies , 2002 .

[14]  Luigi Carro,et al.  Evaluating SEU and crosstalk effects in network-on-chip routers , 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

[15]  Axel Jantsch,et al.  Power analysis of link level and end-to-end data protection in networks on chip , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[16]  Luca Benini,et al.  Low power error resilient encoding for on-chip data buses , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[17]  Igor L. Markov,et al.  Error-correction and crosstalk avoidance in DSM busses , 2004, IEEE Trans. Very Large Scale Integr. Syst..

[18]  Sachin S. Sapatnekar,et al.  Exact and efficient crosstalk estimation , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[19]  Kurt Keutzer,et al.  Bus encoding to prevent crosstalk delay , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[20]  Cecilia Metra,et al.  New ECC for crosstalk impact minimization , 2005, IEEE Design & Test of Computers.

[21]  Partha Pratim Pande,et al.  Design of Low power & Reliable Networks on Chip through joint crosstalk avoidance and forward error correction coding , 2006, 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

[22]  Ahmad Patooghy,et al.  A Low-Power and SEU-Tolerant Switch Architecture for Network on Chips , 2007, 13th Pacific Rim International Symposium on Dependable Computing (PRDC 2007).

[23]  Naresh R. Shanbhag,et al.  Toward achieving energy efficiency in presence of deep submicron noise , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[24]  Shi Xiao.  Study on Generalized Predictive Control for the Neutron Flux Density of the Nuclear Reactor , 2003 .

[25]  C. L. Liu,et al.  Minimum crosstalk channel routing , 1993, ICCAD.

[26]  David Blaauw,et al.  Active shields: a new approach to shielding global wires , 2002, GLSVLSI '02.

[27]  Partha Pratim Pande,et al.  Crosstalk-Aware Channel Coding Schemes for Energy Efficient and Reliable NOC Interconnects , 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[28]  Luca Benini,et al.  Networks on Chips : A New SoC Paradigm , 2022 .

[29]  S. Joe Qin,et al.  A survey of industrial model predictive control technology , 2003 .

[30]  Mircea R. Stan,et al.  Bus-invert coding for low-power I/O , 1995, IEEE Trans. Very Large Scale Integr. Syst..

[31]  Mahmut T. Kandemir,et al.  Fault tolerant algorithms for network-on-chip interconnect , 2004, IEEE Computer Society Annual Symposium on VLSI.

[32]  Luca Benini,et al.  Analysis of error recovery schemes for networks on chips , 2005, IEEE Design & Test of Computers.

[33]  Naresh R. Shanbhag,et al.  Coding for reliable on-chip buses: a class of fundamental bounds and practical codes , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[34]  Chita R. Das,et al.  Exploring Fault-Tolerant Network-on-Chip Architectures , 2006, International Conference on Dependable Systems and Networks (DSN'06).