Characterization and modeling of on-chip via stacks for RF-CMOS applications
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Alejandro Díaz-Sánchez | Mónico Linares Aranda | Alejandro Díaz-Sánchez | Reydezel Torres-Torres | Reydezel Torres-Torres | Carlos Alberto Sanabria Diaz
[1] Jiangtao Xu,et al. A novel delay optimization method for a critical path in VLSI design , 2013, IEICE Electron. Express.
[2] Ling Zhang,et al. Built-In Self-Diagnosis and Fault-Tolerant Daisy-Chain Design in MEDA Biochips* , 2018, 2018 IEEE International Test Conference (ITC).
[3] R. L. de Orio,et al. Effect of Lines and Vias Density on the BEOL Temperature Distribution , 2018, 2018 33rd Symposium on Microelectronics Technology and Devices (SBMicro).
[4] Ryuichi Fujimoto,et al. A 12.8-Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth, Large-Capacity Storage Systems , 2019, IEEE Journal of Solid-State Circuits.
[5] Liang-Hung Lu,et al. A 32-GHz Rotary Traveling-Wave Voltage Controlled Oscillator in 0.18-$\mu{\hbox{m}}$ CMOS , 2007, IEEE Microwave and Wireless Components Letters.
[6] Zhanjun Bai,et al. A 2-GHz Pulse Injection-Locked Rotary Traveling-Wave Oscillator , 2016, IEEE Transactions on Microwave Theory and Techniques.
[7] Baris Taskin,et al. Stability of Rotary Traveling Wave Oscillators under process variations and NBTI , 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).
[8] Joungho Kim,et al. Through Silicon Via (TSV) Defect Modeling, Measurement, and Analysis , 2017, IEEE Transactions on Components, Packaging and Manufacturing Technology.
[9] Jong Kang Park,et al. A unified system level error model of crosstalk and electromigration for on-chip interconnect , 2017, IEICE Electron. Express.
[10] Zhijian Xie,et al. Design of 110–152 GHz rotary traveling wave oscillators in 65 nm CMOS technology , 2014, IEEE SOUTHEASTCON 2014.
[11] Christopher J. Wilson,et al. Modeling of Via Resistance for Advanced Technology Nodes , 2017, IEEE Transactions on Electron Devices.
[12] Jongsuck Bae,et al. An oscillator-based sensor using a capacitive metal mesh for sensitive detection of dielectric materials in the terahertz region , 2018, IEICE Electron. Express.
[13] Yukihiro Tahara,et al. Millimeter-wave transmission line with through-silicon via for RF-MEMS devices , 2013, IEICE Electron. Express.
[14] Abdolreza Nabavi,et al. Transformer feedback millimeter-wave VCO with capacitance cancellation technique in 0.18-µm CMOS , 2011, IEICE Electron. Express.
[15] Mohammed Nadhim Abbas,et al. Ultra low power and highly linearized LNA for V-band RF applications in 180 nm CMOS technology , 2017, IEICE Electron. Express.
[16] Mónico Linares Aranda,et al. A simple model of inter-metallic connections (vias) in CMOS resonant rotary traveling wave oscillator (RTWO) , 2017, 2017 14th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE).
[17] Fengjuan Wang,et al. A high-pass filter based on through-silicon via (TSV) , 2019, IEICE Electron. Express.
[18] Jizeng Wei,et al. Design optimization for capacitive-resistively driven on-chip global interconnect , 2015, IEICE Electron. Express.
[19] Jun Fan,et al. A survey on modeling strategies for high-speed differential Via between two parallel plates , 2017, 2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI).
[20] Tadahiro Kuroda,et al. Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link , 2007, IEICE Trans. Electron..
[21] Fengjuan Wang,et al. A novel guard method of through-silicon-via (TSV) , 2018, IEICE Electron. Express.
[22] Jun Fan,et al. Analytical evaluation of scattering parameters for equivalent circuit of through silicon via array , 2015 .
[23] Chong-Jin Ong,et al. Procedure for length matching of daisy-chained clock and command/address/control signal traces including via length compensation , 2019, IEEE Electromagnetic Compatibility Magazine.
[24] Shouhei Kousai. Recent progress in CMOS RF circuit design , 2014, IEICE Electron. Express.
[25] Gang Wang,et al. Equivalent circuit model of through-silicon-via in slow wave mode , 2017, IEICE Electron. Express.