A structured approach to macrocell testing using built-in self-test

The proposed design-for-testability strategy suggests first dividing a complex VLSI system into various structural modules and then implementing a specific built-in self-test (BIST) scheme for each module. A general procedure to realize BIST in a specific set of modules, namely the macrocells is described. The availability of the automated BIST for macrocells has increased the ease of testing for embedded macrocells, standardized macrocell testing for embedded macrocells, standardized macrocell testing strategy, almost eliminated the test vector generation time for these structures, reduced the diagnostic runtimes, decreased the overall chip cost, and decreased the turn-around time to get the devices to market.<<ETX>>