论文信息 - Implementation of iterative networks with CMOS differential logic

Implementation of iterative networks with CMOS differential logic

An improved differential CMOS logic family called enabled/disabled CMOS differential logic (ECDL) is presented. An extension to this logic technique which enables the implementation of iterative network arrays is also presented. Two simple logic functions, a Gray-to-binary decoder and an XOR cell, are implemented to demonstrate this methodology. >

S.-L. Lu | S.-L.L. Lu

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