The implementation of a high speed ATM packet switch using cmos vlsi

This paper describes the implementation of an ATM switch capable of operation at the SONET STS-3 rate. These speeds are achieved using low-cost custom CMOS VLSI. The switch is based on the self-routing Batcher/banyan fabric with contention resolution. To minimize the size of the switch, the fabric is built using a three dimensional structure based on a rearrangement of the shuffle/exchange wiring pattern used in the Batcher/banyan. The components operate at high speed due to the density of the fabric, and the extensive use of pipelining and dynamic logic. The most complex of the fabric components have already been designed and tested at speeds much higher than the intended STS-3 rate.

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