A Self-Timed Ring Based True Random Number Generator on FPGA
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True random number generators (TRNGs) are essential components for information security. This paper presents a combination of self-timed ring (STR) and ultra-fast carry-logic primitives to design a new TRNG on FPGA. Applying this structure, entropy extraction efficiency of the TRNG can be improved. By manually routing, the proposed TRNG is implemented on Xilinx Virtex 5 FPGA and occupies 47 slices. The proposed TRNG can achieve 150Mbps high quality random numbers throughput and pass all NIST tests.
[1] corporateName,et al. Design Automation Conference (DAC) , 2011 .
[2] C. Choy,et al. IEEE Transactions on Computers, Vol. 51 , 2001 .