Wavelet Lifting on Application Specific Vector Processor

With the start of the widespread use of discrete wavelet transform the need for its efficient implementation is becoming increasingly more important. This work presents a general approach of discrete wavelet transform scheme vectorisation evaluated on an FPGAbased Application-Specific Vector Processor (ASVP). This unit can be classified as SIMD computer in Flynn’s taxonomy. The presented approach is compared with two other non-vectorised approaches. Using the frequently exploited CDF 9/7 wavelet, the achieved speedup is about 2:6 compared to naive implementation.

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