The Use of Agile Methodology for Porting Analog and Mixed-Signal Circuits Between Different Technology Nodes

With the growing need for increased capacity, speed and capabilities, the complexity of Integrated Circuit (IC) designs continue to increase. With the increased level of complexity and market pressures to deliver better results faster and cheaper, IC companies are forced to innovate and introduce efficiencies into their development process. To improve IC design productivity and time-to-market, this paper introduces an innovative Electronic Design Automation (EDA) tool that will allow the replication of an existing layout in different technology nodes by automatically porting analog and mixed-signal circuits. Furthermore, to better manage the complexity of IC development projects, the paper suggests the use of iterative and incremental approach of agile methods by presenting a case study on an EDA tool development project.

[1]  Xuan Zeng,et al.  Automated Technology Migration Methodology for Mixed-Signal Circuit Based on Multistart Optimization Framework , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[2]  Jim Highsmith.  What Is Agile Software Development? 1 , 2002 .

[3]  Jianwen Zhu,et al.  Calligrapher: a new layout-migration engine for hard intellectual property libraries , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[4]  P.K. Kar,et al.  TECHMIG: A layout tool for technology migration , 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

[5]  P.W. Diodato,et al.  Porting of a CMOS VLSI Chip from 2.5 Micron to 1.75 Micron Design Rules , 1984, ESSCIRC '84: Tenth European Solid-State Circuits Conference.

[6]  Yih-Lang Li,et al.  Topology-driven cell layout migration with collinear constraints , 2009, 2009 IEEE International Conference on Computer Design.

[7]  Orit Hazzan,et al.  The Agile Manifesto , 2014 .

[8]  Kenneth Francken,et al.  Methodology for analog technology porting including performance tuning , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[9]  Jens Lienig,et al.  Automation of Analog IC Layout: Challenges and Solutions , 2015, ISPD.

[10]  Alberto L. Sangiovanni-Vincentelli,et al.  The Tides of EDA , 2003, IEEE Des. Test Comput..

[11]  Jan M. Rabaey,et al.  Limitations and challenges of computer-aided design technology for CMOS VLSI , 2001, Proc. IEEE.

[12]  Mark D. Birnbaum.  Essential Electronic Design Automation (Eda) , 2003 .

[13]  J. T. Lochner.  The Journal of Defense Software Engineering , 1999 .

[14]  Nobuto Ono,et al.  Adaptive porting of analog IPs with reusable conservative properties , 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).

[15]  Francisco V. Fernández,et al.  Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits , 1992 .

[16]  JaatunMartin Gilje,et al.  Agile Software Development , 2002, Comput. Sci. Educ..