The FPGA Implementation of Amplitude-Locked Loop System for Co-channel Communication Chip Design

The modulated carrier is often interfered by any type of noises. The co-channel separation system is a demodulation function with dominant and subdominant signals using the receiver of modulation process system by operating at the same as the carrier modulation system. In this thesis, we adopted the field-programmable gate array (FPGA) design platform to develop and achieve the co-channel separation and demodulation chip design for the additive white Gaussian noise (AWGN) interference. In this thesis, the FPGA of Compact-RIO system are integrated and applied to attain the function of communication characteristic chip and hardware design by programming the graphical language.