Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability
暂无分享,去创建一个
Francisco J. Cazorla | Sascha Uhrig | Pascal Sainrat | Guillem Bernat | Hugues Cassé | Christine Rochange | Eduardo Quiñones | Theo Ungerer | Mike Gerdes | Florian Kluge | Marco Paolieri | Zlatko Petrov | Julian Wolf | Michael Houston | Jörg Mische | Irakli Guliashvili | Stefan Metzlaff | G. Bernat | Michael Houston | F. Cazorla | E. Quiñones | T. Ungerer | H. Cassé | Christine Rochange | P. Sainrat | Marco Paolieri | Florian Kluge | M. Gerdes | S. Uhrig | Stefan Metzlaff | Z. Petrov | Julian Wolf | Irakli Guliashvili | Jörg Mische
[1] Sascha Uhrig,et al. How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT , 2010, ARCS.
[2] Sascha Uhrig,et al. Exploiting spare resources of in-order SMT processors executing hard real-time threads , 2008, 2008 IEEE International Conference on Computer Design.
[3] Pascal Sainrat,et al. OTAWA: An Open Toolbox for Adaptive WCET Analysis , 2010, SEUS.
[4] Martin Schoeberl,et al. Time-Predictable Computer Architecture , 2009, EURASIP J. Embed. Syst..
[5] Jan Reineke,et al. Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[6] Sharad Malik,et al. Performance analysis of embedded software using implicit path enumeration , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[7] Sascha Uhrig,et al. Predictable dynamic instruction scratchpad for simultaneous multithreaded processors , 2008, MEDEA '08.
[8] Sascha Uhrig,et al. RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor , 2010, 2010 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing.
[9] Eric Rotenberg,et al. Virtual multiprocessor: an analyzable, high-performance architecture for real-time computing , 2005, CASES '05.
[10] Francisco J. Cazorla,et al. An Analyzable Memory Controller for Hard Real-Time CMPs , 2009, IEEE Embedded Systems Letters.
[11] Pascal Sainrat,et al. A Context-Parameterized Model for Static Analysis of Execution Times , 2009, Trans. High Perform. Embed. Archit. Compil..
[12] Francisco J. Cazorla,et al. Hardware support for WCET analysis of hard real-time multicore systems , 2009, ISCA '09.
[13] Stephen A. Edwards,et al. Predictable programming on a precision timed architecture , 2008, CASES '08.
[14] Uwe Brinkschulte,et al. Real-time scheduling on multithreaded processors , 2000, Proceedings Seventh International Conference on Real-Time Computing Systems and Applications.
[15] Sascha Uhrig,et al. jamuth: an IP processor core for embedded Java real-time systems , 2007, JTRES.
[16] Pascal Sainrat,et al. Static Loop Bound Analysis of C Programs Based on Flow Analysis and Abstract Interpretation , 2008, 2008 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications.