Iterative and adaptive slack allocation for performance-driven layout and FPGA routing

The authors gives a generalization, called the limit-bumping algorithm (LBA), of a procedure of H. Youssef et al. (1990) that transforms initial connection delays into upper limits on delay suitable for performance-driven layout. LBA is a simple way to distribute slacks using arbitrary allocation functions. It is shown that lower and upper bounds on connection delays can be used in the computation of upper limits for initial layout and for layout improvement. The methods have been integrated into a delay-sensitive router for field programmable gate arrays (FPGAs). In 22 standard benchmark designs, feasible system clock periods were reduced in every case by an average of 14% and as much as 32%.<<ETX>>

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