Circuit-aware device reliability criteria methodology

Meeting reliability requirements is an increasingly more difficult challenge with each generation of CMOS technology. The disconnection between conventional one-size-fits-all reliability specifications and the wide range of circuit applications might be a huge waste of resources. By taking into consideration circuit-level figures of merit, a novel methodology to establish device reliability criteria that reflects real-world operation of devices in circuits is proposed and demonstrated. This “circuit-aware” methodology makes a real step toward realizing the goal of application-aware reliability standards which do not require additional measurements. The beauty is its simplicity — a simple transformation to solve an important problem. The simplicity makes it attractive as a standard methodology.

[1]  Muhammad Ashraful Alam,et al.  Reliability- and Process-variation aware design of integrated circuits — A broader perspective , 2008, 2011 International Reliability Physics Symposium.

[2]  H.-S. Philip Wong,et al.  Performance benchmarks for Si, III–V, TFET, and carbon nanotube FET - re-thinking the technology assessment methodology for complementary logic applications , 2010, 2010 International Electron Devices Meeting.

[3]  T. Nigam,et al.  Accurate product lifetime predictions based on device-level measurements , 2009, 2009 IEEE International Reliability Physics Symposium.

[4]  B. S. Doyle,et al.  A lifetime prediction method for hot-carrier degradation in surface-channel p-MOS devices , 1990 .

[5]  R. Wong,et al.  Impact of NBTI Induced Statistical Variation to SRAM Cell Stability , 2006, 2006 IEEE International Reliability Physics Symposium Proceedings.

[6]  Balaji Vaidyanathan,et al.  The relationship between transistor-based and circuit-based reliability assessment for digital circuits , 2011, 2011 International Reliability Physics Symposium.

[7]  P. Abramowitz,et al.  Realistic Projections of Product Fmax Shift and Statistics due to HCI and NBTI , 2007, 2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual.

[8]  D. Scott,et al.  Reliability effects on MOS transistors due to hot-carrier injection , 1985 .

[9]  A. Bravaix,et al.  Novel hot-carrier AC-DC design guidelines for advanced CMOS nodes , 2008, 2008 IEEE International Reliability Physics Symposium.