Gain-enhancement differential amplifier using positive feedback

This paper presents a differential amplifier design with gain enhancement using positive feedback. Comparing with the standard complementary metal-oxide-semiconductor (CMOS) differential amplifier, the new circuit has improved specifications, such as higher small-signal voltage gain, output voltage swing, and large bandwidth. In addition, the circuit has a built-in tuning capability for adjustable gain or tuning out the process-voltage-temperature (PVT) variations. This paper also presents a comparison of noise and power dissipation that was performed using Spice simulations.

[1]  J. Burleson,et al.  Maximum intrinsic gain degradation in technology scaling , 2007, 2007 International Semiconductor Device Research Symposium.

[2]  Mark Pude,et al.  Amplifier gain enhancement with positive feedback , 2010, 2010 53rd IEEE International Midwest Symposium on Circuits and Systems.

[3]  Ramesh Harjani,et al.  Partial positive feedback for gain enhancement of low-power CMOS otas , 1995 .

[4]  Randall L. Geiger,et al.  A high gain strategy with positive-feedback gain enhancement technique , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[5]  Randall L. Geiger,et al.  All digital transistor high gain operational amplifier using positive feedback technique , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[6]  R. Jacob Baker,et al.  CMOS Circuit Design, Layout, and Simulation , 1997 .

[7]  Randall L. Geiger,et al.  Positive feedback gain-enhancement techniques for amplifier design , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).