Design of a Current Mode Multiplexed Circuit for Integrate & Fire Neuromorphic Systems

The design of a multi-chip architecture can be an effective solution to implement very large Artificial Neural Networks systems. Undoubtedly, the size of these systems often represents an arduous obstacle in the way of a deep and effective investigation on most of these innovative, “bio-inspired”, computational paradigms. This paper deals with the design and test of a couple of VLSI analogue chips based on Integrate and Fire Neuromorphic model well suited to carry out large systems. The particular current mode design is able to reduce the number of the analogue interconnections by employing a time-multiplexed technique for the inter-chip communication channels.

[1]  Fausto Sargeni,et al.  A 3 × 3 digitally programmable CNN chip , 1996, Int. J. Circuit Theory Appl..

[2]  Patrick Camilleri,et al.  A VLSI network of spiking neurons with plastic fully configurable “stop-learning” synapses , 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

[3]  Fausto Sargeni,et al.  A 6 × 6 Cells Interconnection-Oriented Programmable Chip for CNN , 1998 .

[4]  R. Douglas,et al.  A multi-chip pulse-based neuromorphic infrastructure and its application to a cortical model of orientation selectivity , 2006 .

[5]  Giacomo Indiveri,et al.  A low-power adaptive integrate-and-fire neuron circuit , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[6]  Vincenzo Bonaiuto,et al.  Programmable non-linearity for STAR cellular neural networks , 2009, 2009 European Conference on Circuit Theory and Design.

[7]  Kenneth R. Laker,et al.  Design of analog integrated circuits and systems , 1994 .

[8]  Vincenzo Bonaiuto,et al.  A fully digitally programmable CNN chip , 1995 .

[9]  Vincenzo Bonaiuto,et al.  An interconnection architecture for integrate and fire neuromorphic multi-chip networks , 2009, 2009 52nd IEEE International Midwest Symposium on Circuits and Systems.

[10]  V. Bonaiuto,et al.  Multiplexed Circuit for Star-CNN Architecture , 2006, 2006 10th International Workshop on Cellular Neural Networks and Their Applications.

[11]  Fausto Sargeni,et al.  A 3 × 3 digitally programmable CNN chip , 1996 .

[12]  W. Guggenbuhl,et al.  On charge injection in analog MOS switches and dummy switch compensation techniques , 1990 .

[13]  Patrick Camilleri,et al.  A Neuromorphic aVLSI network chip with configurable plastic synapses , 2007, 7th International Conference on Hybrid Intelligent Systems (HIS 2007).

[14]  Juan López Coronado,et al.  AER Neuro-Inspired interface to Anthropomorphic Robotic Hand , 2006, The 2006 IEEE International Joint Conference on Neural Network Proceedings.

[15]  Massimiliano Giulioni,et al.  An aVLSI recurrent network of spiking neurons with reconfigurable and plastic synapses , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[16]  Fausto Sargeni,et al.  A Dedicated Multi-Chip Programmable System for Cellular Neural Networks , 1999 .

[17]  Fausto Sargeni,et al.  Digitally programmable nonlinear function generator for neural networks , 2005 .

[18]  Melanie Hartmann,et al.  Design Of Analog Cmos Integrated Circuits , 2016 .

[19]  Fausto Sargeni,et al.  Programmable CNN Analogue Chip for RD-PDE Multi-Method Simulations , 2005 .

[20]  Fausto Sargeni,et al.  An improved architecture for the interconnections in a multi-chip CNN system , 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

[21]  Vittorio Dante,et al.  A VLSI recurrent network of integrate-and-fire neurons connected by plastic synapses with long-term memory , 2003, IEEE Trans. Neural Networks.

[22]  Fausto Sargeni Digitally programmable transconductance amplifier for CNN applications , 1994 .

[23]  Lin-Bao Yang,et al.  Cellular neural networks: theory , 1988 .

[24]  Vincenzo Bonaiuto,et al.  Multi-chip Integrate and Fire neural network architecture , 2010, Melecon 2010 - 2010 15th IEEE Mediterranean Electrotechnical Conference.

[25]  V. Bonaiuto,et al.  VLSI circuits for multiplexed Star CNNs , 2010, 2010 12th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2010).

[26]  V. Bonaiuto,et al.  Time division digital programmable OTA for cellular neural networks , 2005, Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005..

[27]  Carver Mead,et al.  Analog VLSI and neural systems , 1989 .