A low-power, radiation-hardened, CAN-interface for system-on-chip space applications
暂无分享,去创建一个
Nikolaos Stamatopoulos | Emmanuel T. Sarris | G. Kottaras | Georgios Pouiklis | Athanasios Psomoulis
[1] Federico Faccio,et al. Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: practical design aspects , 1999 .
[2] E. L. Petersen,et al. Approaches to proton single-event rate calculations , 1996 .
[3] Anantha P. Chandrakasan,et al. Minimizing power consumption in digital CMOS circuits , 1995, Proc. IEEE.
[4] Andreas G. Andreou,et al. Low-Voltage/Low-Power Integrated Circuits and Systems , 1999 .
[5] E. Gebreselasie,et al. The influence of high resistivity substrates on CMOS latchup robustness , 2005, 2005 Electrical Overstress/Electrostatic Discharge Symposium.
[6] H. Hughes,et al. Radiation effects and hardening of MOS technology: devices and circuits , 2003 .