Multi-chip package memory stacked memory chips, method for stacking memory and method for controlling operation of multi-chip package memory

The memory chips are stacked multi-chip package, a memory, an operation control method of the multilayer of the memory chip and multi-chip package memory method is disclosed. The multi-chip package, the memory may include a memory chip passes, the first to the n memory chips (n is a natural number) and a through electrode. The transfer memory chip passes the signal output from the signal received from the outside or inside. The first to n-th memory chip is included in at least one bank, and stacked in the vertical direction on the transfer memory chip. The through electrodes are carry signals are connected to the upper surface of the n-th memory chip from the top surface of the transfer the memory chip. The first to n-th memory chip of the at least two banks of memory chips are corresponding to the same address of the bank that is laminated so as to have the same position in the vertical direction. The multi-chip package, the memory has an advantage that can perform the read or write operation efficient than multi-chip package using a conventional memory of the through electrode.