1080p 60 Hz Intra-Frame Video CODEC Chip Design and Its Implementation

This paper presents a 1080p 60 Hz intra-frame CODEC system for zero delay AV streaming. For high quality streaming, the proposed CODEC employs an RGB-domain inter-color compensation algorithm using strong correlation between RGB color components which was previously presented by the authors of this paper. The proposed CODEC architecture is based on macroblock-level pipelining and parallel processing to handle a significant pixel rate of 1080p 60 Hz videos with RGB 4:4:4 format, i.e., 3 Gbps. Since syntax processing is a bottleneck to supporting speeds of up to 100 Mbps in real-time, a high performance context-adaptive variable length coding architecture exploiting the look-ahead technique is included in the proposed design. Also, the number of syntax symbols is adaptively restricted to accomplish zero end-to-end delay. Finally, by using MPEG-2 TS as the AV stream format, compatibility with general channel chips is guaranteed. Using TSMC 90 nm CMOS technology, the prototype chip is implemented with 1,208 K logic gates and 359 Kb internal SRAM. The chip can achieve real-time encoding and decoding of 1080p 60 Hz videos at 200 MHz execution speed in typical work conditions.

[1]  Liang-Gee Chen,et al.  A 1.3TOPS H.264/AVC single-chip encoder for HDTV applications , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[2]  Jiun-In Guo,et al.  A 160K Gates/4.5 KB SRAM H.264 Video Decoder for HDTV Applications , 2007, IEEE J. Solid State Circuits.

[3]  Liang-Gee Chen,et al.  Performance analysis of hardware oriented algorithm modification in H.264 , 2003, 2003 International Conference on Multimedia and Expo. ICME '03. Proceedings (Cat. No.03TH8698).

[4]  Hiroshi Ueda,et al.  A 342 mW Mobile Application Processor With Full-HD Multi-Standard Video Codec and Tile-Based Address-Translation Circuits , 2010, IEEE Journal of Solid-State Circuits.

[5]  Itu-T.  Video coding for low bitrate communication , 1996 .

[6]  Yang Song,et al.  HDTV1080p H.264/AVC Encoder Chip Design and Performance Analysis , 2009, IEEE Journal of Solid-State Circuits.

[7]  Liang-Gee Chen,et al.  An H.264/AVC scalable extension and high profile HDTV 1080p encoder chip , 2008, 2008 IEEE Symposium on VLSI Circuits.

[8]  Jar-Ferr Yang,et al.  A Highly Efficient VLSI Architecture for H.264/AVC CAVLC Decoder , 2008, IEEE Transactions on Multimedia.

[9]  Tian-Sheuan Chang,et al.  A High-Definition H.264/AVC Intra-Frame Codec IP for Digital Video and Still Camera Applications , 2006, IEEE Transactions on Circuits and Systems for Video Technology.

[10]  Liang-Gee Chen,et al.  Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder , 2006, IEEE Transactions on Circuits and Systems for Video Technology.

[11]  M. Kimura,et al.  A 256 mW 40 Mbps Full-HD H.264 High-Profile Codec Featuring a Dual-Macroblock Pipeline Architecture in 65 nm CMOS , 2009, IEEE Journal of Solid-State Circuits.

[12]  Thomas Wiegand,et al.  Draft ITU-T recommendation and final draft international standard of joint video specification , 2003 .

[13]  Byung Cheol Song,et al.  A novel CAVLC architecture for H.264 Video encoding at high bit-rate , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[14]  Jiun-In Guo,et al.  A 252kgate/71mW Multi-Standard Multi-Channel Video Decoder for High Definition Video Applications , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[15]  Qiang Li,et al.  A Fully Integrated MIMO Multiband Direct Conversion CMOS Transceiver for WLAN Applications (802.11n) , 2007, IEEE Journal of Solid-State Circuits.

[16]  Liang-Gee Chen,et al.  Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder , 2005, IEEE Transactions on Circuits and Systems for Video Technology.

[17]  Byung Cheol Song,et al.  Block Adaptive Inter-Color Compensation Algorithm for RGB 4:4:4 Video Coding , 2008, IEEE Transactions on Circuits and Systems for Video Technology.

[18]  Xuemin Chen,et al.  Video coding using the H.264/MPEG-4 AVC compression standard , 2004, Signal Process. Image Commun..

[19]  Liang-Gee Chen,et al.  Algorithm analysis and architecture design for HDTV applications - a look at the H.264/AVC video compressor system , 2006, IEEE Circuits and Devices Magazine.

[20]  Byung Cheol Song,et al.  An intra-frame rate control algorithm for ultra low delay H.264/AVC coding , 2008, 2008 IEEE International Conference on Acoustics, Speech and Signal Processing.