A March-CL test for interconnection faults of SOC
暂无分享,去创建一个
[1] Qiang Xu,et al. Test-wrapper designs for the detection of signal-integrity faults on core-external interconnects of SoCs , 2007, 2007 IEEE International Test Conference.
[2] Mehrdad Nourani,et al. Testing SoC interconnects for signal integrity using extended JTAG architecture , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[3] A. Hlawiczka,et al. Crosstalk-Insensitive Method for Testing of Delay Faults in Interconnects Between Cores in SoCs , 2007, 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems.
[4] Chih-Wea Wang,et al. Simulation-based test algorithm generation and port scheduling for multi-port memories , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[5] Chandra Tirumurti,et al. On modeling crosstalk faults , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[6] Sujit Dey,et al. Fault modeling and simulation for crosstalk in system-on-chip interconnects , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).
[7] Qiang Xu,et al. SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects , 2007, 2007 44th ACM/IEEE Design Automation Conference.
[8] Ming Shae Wu,et al. Using a periodic square wave test signal to detect crosstalk faults , 2005, IEEE Design & Test of Computers.