A Sensor to Detect Normal or Reverse Temperature Dependence in Nanoscale CMOS Circuits
暂无分享,去创建一个
[1] Arijit Raychowdhury,et al. A 1.05V 1.6mW 0.45°C 3σ-resolution ΔΣ-based temperature sensor with parasitic-resistance compensation in 32nm CMOS , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[2] Kofi A. A. Makinwa,et al. A CMOS smart temperature sensor with a 3σ inaccuracy of ±0.1°C from -55°C to 125°C , 2005, IEEE J. Solid State Circuits.
[3] Saurabh Dighe,et al. Adaptive Frequency and Biasing Techniques for Tolerance to Dynamic Temperature-Voltage Variations and Aging , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[4] I. Filanovsky,et al. Mutual compensation of mobility and threshold voltage temperature effects with applications in CMOS circuits , 2001 .
[5] Chris Toumazou,et al. Trade-Offs in Analog Circuit Design , 2002 .
[6] Kiyoo Itoh,et al. Supply voltage scaling for temperature insensitive CMOS circuit operation , 1998 .
[7] Eric MacDonald,et al. Robust Ultra-Low Power Subthreshold Logic Flip-Flop Design for Reconfigurable Architectures , 2006, 2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006).
[8] B. Streetman. Solid state electronic devices , 1972 .
[9] Paul Ampadu,et al. Adaptive Delay Correction for Runtime Variation in Dynamic voltage Scaling Systems , 2008, J. Circuits Syst. Comput..
[10] Hiroshi Iwai,et al. On the scaling issues and high-κ replacement of ultrathin gate dielectrics for nanoscale MOS transistors , 2006 .
[11] Yu Cao,et al. Predictive Technology Model for Nano-CMOS Design Exploration , 2006, 2006 1st International Conference on Nano-Networks and Workshops.
[12] G. Ji,et al. Design and validation of a power supply noise reduction technique , 2003, Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710).
[13] Paul Ampadu,et al. Normal and Reverse Temperature Dependence in Variation-Tolerant Nanoscale Systems with High-k Dielectrics and Metal Gates , 2008, NanoNet.
[14] Changhae Park,et al. Reversal of temperature dependence of integrated circuits operating at very low voltages , 1995, Proceedings of International Electron Devices Meeting.
[15] Volkan Kursun,et al. Reversed Temperature-Dependent Propagation Delay Characteristics in Nanometer CMOS Circuits , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.
[16] Balaram Sinharoy,et al. Design and implementation of the POWER5 microprocessor , 2004, Proceedings. 41st Design Automation Conference, 2004..
[17] Herming Chiueh,et al. A high–speed CMOS on–chip temperature sensor , 1999 .
[18] Trevor Mudge,et al. Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads , 2002, ICCAD 2002.
[19] E. Nowak,et al. High-performance CMOS variability in the 65-nm regime and beyond. IBM J Res And Dev , 2006 .
[20] Katherine Shu-Min Li,et al. Temperature-aware dynamic frequency and voltage scaling for reliability and yield enhancement , 2009, 2009 Asia and South Pacific Design Automation Conference.
[21] Poki Chen,et al. A Fully Digital Time-Domain Smart Temperature Sensor Realized With 140 FPGA Logic Elements , 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.
[22] Manoj Sachdev,et al. Variation-Aware Adaptive Voltage Scaling System , 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.