论文信息 - A modular architecture for a 6.4-Gbyte/s, 8-Mbit media chip

A modular architecture for a 6.4-Gbyte/s, 8-Mbit media chip

Develops a modular architecture for a DRAM-integrated, multimedia chip, or media chip with a data transfer rate of 6 to 12 Gbyte/s. The DRAM macro enables the design flexibility both for DRAM capacity and the logic-memory interface to meet a wide variety of applications. A 6.4-Gbyte/s. 8-Mbit test chip was fabricated.

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