The VLSI Complexity of Selected Graph Problems

General lower bound techniques are developed to determine the VLSI complexity of graph problems with some surprising results that show a striking difference between this class of problems and the other classes studied in the literature. The results show that the VLSI complexity of graph problems depends crucially on several parameters such as the I/O formats, the locations of the I/O ports, and the timing of the I/O bits. Almost all of our lower bounds can be matched with existing upper bounds or bounds obtained by some minor modifications of existing algorithms. 17 references.

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