论文信息 - Operational features of an MOS timing simulator

Operational features of an MOS timing simulator

This paper describes operational features of a timing simulator having performance characteristics between those of circuit analysis programs and conventional logic simulators.

Paul Kozak | Herman K. Gummel | Basant R. Chawla

[1] S. G. Chappell,et al. Lamp: Logic-circuit simulators , 1974 .

[2] Stephen A. Szygenda,et al. A model and implementation of a universal time delay simulator for large digital nets , 1970, AFIPS '70 (Spring).

[3] W. H. Sass. GAZELLE: an interactive graphic logic design system , 1974, SIGD.

[4] James S. Jephson,et al. A Three-Value Computer Design Verification System , 1969, IBM Syst. J..

[5] Aaas News,et al. Book Reviews , 1893, Buffalo Medical and Surgical Journal.

[6] Sundaram Seshu,et al. The Diagnosis of Asynchronous Sequential Switching Systems , 1962, IRE Trans. Electron. Comput..

[7] Brenda M. Csencsits,et al. A minicomputer-based logic circuit fault simulator , 1974, SIGD.

[8] G. W. Smith,et al. Lamp: System description , 1974 .

[9] G. G. Stokes. "J." , 1890, The New Yale Book of Quotations.

[10] Brenda M. Csencsits,et al. “A minicomputer-based logic-fault simulator” , 1974, DAC '74.

[11] Stephen A. Szygenda. TEGAS2—anatomy of a general purpose TEST GENERATION AND SIMULATION system for digital logic , 1972, DAC '72.