Systematic Synthesis and Design of Ultralow Threshold 2:1 Parametric Frequency Dividers

A new method is discussed for the systematic synthesis, design, and performance optimization of single-ended varactor-based 2:1 parametric frequency dividers (PFDs) exhibiting an ultralow-power threshold (<inline-formula> <tex-math notation="LaTeX">${P_{\mathrm{ th}}}$ </tex-math></inline-formula>). For the first time, it is analytically shown that the <inline-formula> <tex-math notation="LaTeX">${P_{\mathrm{ th}}}$ </tex-math></inline-formula>-value exhibited by any PFD can be expressed as an explicit closed-form function of the different impedances forming its network. Such a unique and unexplored property permits reliance on linear models, during PFD design and performance optimization. The validity of our analytical model has been verified, in a commercial circuit simulator, through the time- and frequency-domain algorithms. To demonstrate the effectiveness of our new synthesis approach, we also report on a lumped prototype of a 200:100 MHz PFD, realized on a printed circuit board (PCB). Although inductors with quality factors lower than 50 were used, the PFD prototype exhibits a <inline-formula> <tex-math notation="LaTeX">${P_{\mathrm{ th}}}$ </tex-math></inline-formula>-value lower than −15 dBm. Such a <inline-formula> <tex-math notation="LaTeX">${P_{\mathrm{ th}}}$ </tex-math></inline-formula>-value is the lowest one ever reported for passive varactor-based PFDs operating in the same frequency range.