Double heterojunction bipolar transistors (DHBTs) based on InP have continually demonstrated record device 1 and circuit performance 2 . However, additional improvements can be made to the performance, yield, and integration density of InP HBT devices and circuits that will expand the range of useful applications for this technology. Performance requirements for future high speed, low power, mixed-signal circuit applications have continued to push the development of InP double heterojunction bipolar transistor (DHBT) device design. Higher frequencies and greater levels of integration will be desirable in next generation architectures. To meet the demands for future high-speed electronics, we have developed a planar InP-based HBT process that is compatible with high-yield advanced interconnect technology needed for the higher level of integration 3 . Along with developing a planar technology, device performance enhancements were also achieved via reduction of the base-collector junction capacitance, C BC 4 . The device fabricated using this new process has achieved excellent RF characteristics, with unity gain cutoff frequency (f T ) and maximum oscillation frequency (f MAX ) of 272 and 430 GHz, respectively.