Positive feedback in adiabatic logic
暂无分享,去创建一个
An adiabatic logic family is presented, which makes use of a CMOS positive feedback amplifier. The gate is based on dual rail logic and a cascade of such gates only needs three power/clock lines to operate. The positive feedback amplifier ensures high noise immunity and takes part in the energy recovery process.
[1] N. Tzartzanis,et al. A Framework for Practical Low-Power Digital CMOS Systems Using Adiabatic-Switching Principles , 1994 .
[2] Nestoras Tzartzanis,et al. Low-power digital systems based on adiabatic-switching principles , 1994, IEEE Trans. Very Large Scale Integr. Syst..