Measurement-Based Interconnect Capacitance Characterization for Circuit Simulations

A characterization methodology to model interconnect capacitance for accurate circuit simulation is presented. The method utilizes a simple measurement scheme to measure inter-layer capacitances. The measured data is then used to tune a layout tool for accurate interconnect parasitic extraction. Results show good fit between simulated and measured ring oscillator speeds for a production 0.5μm, 3-level metal process.

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