论文信息 - A dual-mode synchronous/asynchronous CORDIC processor

A dual-mode synchronous/asynchronous CORDIC processor

For application in a software defined radio, a CORDIC processor has been developed that can operate both in synchronous and asynchronous mode. Each mode of operation has advantages and drawbacks. Depending on the actual application, an optimal trade-off can be achieved by selecting the mode of operation that fits best with system demands. We believe that for a system developer this additional degree of freedom significantly increases the application space. The design has been implemented on a 0.25 /spl mu/m SiGe:C BiCMOS process. Simulation results using post-layout extracted parameters indicate that the design is competitive both with purely synchronous and purely asynchronous implementations.

Koushik Maharatna | Eckhard Grass | Bodhisatya Sarker

[1] Ivan E. Sutherland,et al. Micropipelines , 1989, Commun. ACM.

[2] Martin Morf,et al. Generalized CORDIC for digital signal processing , 1982, ICASSP.

[3] Anindya Sundar Dhar,et al. Multiplierless array architecture for computing Discrete Cosine Transform , 1995 .

[4] Alvin M. Despain,et al. Very Fast Fourier Transform Algorithms Hardware for Implementation , 1979, IEEE Transactions on Computers.

[5] Anindya Sundar Dhar,et al. An array architecture for fast computation of discrete Hartley transform , 1991 .

[6] Paul Day,et al. Investigation into micropipeline latch design styles , 1995, IEEE Trans. Very Large Scale Integr. Syst..

[7] J. M. Casalta,et al. Substrate coupling evaluation in BiCMOS technology , 1997 .

[8] Ted E. Williams. Performance of iterative computation in self-timed rings , 1994, J. VLSI Signal Process..