High-order continuous-time incremental ΣΔ ADC for multi-channel applications
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[1] Maurits Ortmanns,et al. Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.
[2] Maurits Ortmanns,et al. A continuous-time /spl Sigma//spl Delta/ Modulator with reduced sensitivity to clock jitter through SCR feedback , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.
[3] G.C. Temes,et al. A low-power 22-bit incremental ADC , 2006, IEEE Journal of Solid-State Circuits.
[4] Gabor C. Temes,et al. Theory and applications of incremental ΔΣ converters , 2004, IEEE Trans. Circuits Syst. I Regul. Pap..
[5] James D. Plummer,et al. A High-Resolution Low-Power Incremental $\Sigma\Delta$ ADC With Extended Range for Biosensor Arrays , 2010, IEEE Journal of Solid-State Circuits.
[6] Esther Rodriguez-Villegas,et al. Wearable Electroencephalography , 2010, IEEE Engineering in Medicine and Biology Magazine.
[7] Joachim Haase,et al. A low-power continuous-time incremental 2nd-order-MASH ΣΔ-modulator for a CMOS imager , 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).
[8] Franco Maloberti,et al. Multi-bit high-order incremental converters with digital calibration , 2009, 2009 European Conference on Circuit Theory and Design.
[9] G. Comi,et al. IFCN standards for digital recording of clinical EEG. International Federation of Clinical Neurophysiology. , 1998, Electroencephalography and clinical neurophysiology.