ROIC Design for a 10k Pixel Photoresistive Image Sensor with On-Chip Calibration

This paper describes a novel readout integrated circuit (ROIC) for a photoresistive image sensor array incorporating Wheatstone bridge configuration with a variable-gain switched-capacitor amplifier. A 12-bit R-2R ladder digital-to-analog converter (DAC) and a variable-gain switched capacitor amplifier are used for on-chip offset and gain calibration. The bias voltage of the bridge is supplied by an on-chip DAC and made programmable between 0 to 1.8 Volts for ROIC performance optimization. This image sensor and ROIC system is intended to be used as an endoscope camera which demands strict silicon area and low power consumption requirements. A sample 1x16 line sensor is used for proof of concept. The ROIC is designed for the target of 30 frames per second output data rate for a 100x100 sensor. This work focuses on the analog signal processing chain of the ROIC. The nominal (base) resistance of each detector is assumed to have a variation of (+-10%). The proposed ROIC is designed in 0.18 um CMOS process. Effectiveness of the calibration method is demonstrated with post-layout simulations performed on 6 PVT corners.