Formal Modeling of Multicast Communication in 3D NoCs
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[1] Cliff B. Jones,et al. RODIN (Rigorous Open Development Environment for Complex Systems) , 2005 .
[2] Prasant Mohapatra,et al. A hardware multicast routing algorithm for two-dimensional meshes , 1996, Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing.
[3] Kaisa Sere,et al. Superposition refinement of reactive systems , 2005, Formal Aspects of Computing.
[4] Sandeep K. Shukla,et al. Formal methods and models for system design: a system level perspective , 2004 .
[5] Leonidas Tsiopoulos,et al. Formal Development of NoC Systems in B , 2006, Nord. J. Comput..
[6] Valentin Puente,et al. MRR: Enabling fully adaptive multicast routing for CMP interconnection networks , 2009, 2009 IEEE 15th International Symposium on High Performance Computer Architecture.
[7] Hamid Sarbazi-Azad,et al. XMulator: A Listener-Based Integrated Simulation Platform for Interconnection Networks , 2007, First Asia International Conference on Modelling & Simulation (AMS'07).
[8] Elena Troubitsyna,et al. Rigorous Open Development Environment for Complex Systems ) , 2005 .
[9] Vincenzo Catania,et al. Application Specific Routing Algorithms for Networks on Chip , 2009, IEEE Transactions on Parallel and Distributed Systems.
[10] Jean-Raymond Abrial. A System Development Process with Event-B and the Rodin Platform , 2007, ICFEM.
[11] Jean-Raymond Abrial,et al. Modeling in event-b - system and software engineering by Jean-Raymond Abrial , 2010, SOEN.
[12] Fernando Gehm Moraes,et al. Deadlock-Free Multicast Routing Algorithm for Wormhole-Switched Mesh Networks-on-Chip , 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.
[13] Cauligi S. Raghavendra,et al. Resource Deadlocks and Performance of Wormhole Multicast Routing Algorithms , 1998, IEEE Trans. Parallel Distributed Syst..
[14] Partha Pratim Pande,et al. Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation , 2009, IEEE Transactions on Computers.
[15] John Harrison. Formal verification at Intel , 2003, 18th Annual IEEE Symposium of Logic in Computer Science, 2003. Proceedings..
[16] Shmuel Katz,et al. A superimposition control construct for distributed systems , 1993, TOPL.
[17] Jean-Raymond Abrial,et al. The B-book - assigning programs to meanings , 1996 .
[18] Luca Benini,et al. An efficient distributed memory interface for many-core platform with 3D stacked DRAM , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).
[19] Jean-Raymond Abrial,et al. Refinement, Decomposition, and Instantiation of Discrete Models: Application to Event-B , 2007, Fundam. Informaticae.
[20] Pao-Ann Hsiung,et al. Creating a Formal Veri fi cation Platform for IBM CoreConnect-based SoC ∗ , 2003 .
[21] Sandeep K. Shukla,et al. Formal Methods and Models for System Design , 2004, Springer US.
[22] Kaisa Sere,et al. Refinement-Based Modeling of 3D NoCs , 2011, FSEN.
[23] Kaisa Sere,et al. Stepwise Refinement of Action Systems , 1991, Struct. Program..
[24] Chita R. Das,et al. MIRA: A Multi-layered On-Chip Interconnect Router Architecture , 2008, 2008 International Symposium on Computer Architecture.
[25] Anna Slobodová,et al. Replacing Testing with Formal Verification in Intel CoreTM i7 Processor Execution Engine Validation , 2009, CAV.
[26] Dominique Cansell,et al. Refinement and Reachability in EventB , 2005, ZB.