暂无分享,去创建一个
[1] John Kubiatowicz,et al. A fault tolerant, area efficient architecture for Shor's factoring algorithm , 2009, ISCA '09.
[2] Yu-Chin Hsu,et al. A formal approach to the scheduling problem in high level synthesis , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[3] Massoud Pedram,et al. LEQA: Latency estimation for a quantum algorithm mapped to a quantum circuit fabric , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).
[4] Igor L. Markov,et al. On the CNOT-cost of TOFFOLI gates , 2008, Quantum Inf. Comput..
[5] Archil Avaliani,et al. Quantum Computers , 2004, ArXiv.
[6] Mark Oskin,et al. Microcoded Architectures for Ion-Tap Quantum Computers , 2008, 2008 International Symposium on Computer Architecture.
[7] Thierry Paul,et al. Quantum computation and quantum information , 2007, Mathematical Structures in Computer Science.
[8] Frederic T. Chong,et al. Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing , 2006, 33rd International Symposium on Computer Architecture (ISCA'06).
[9] Salvador Elías Venegas-Andraca,et al. Quantum Walks for Computer Scientists , 2008, Quantum Walks for Computer Scientists.
[10] Vipin Kumar,et al. Multilevel Algorithms for Multi-Constraint Graph Partitioning , 1998, Proceedings of the IEEE/ACM SC98 Conference.
[11] Giovanni De Micheli,et al. Synthesis and Optimization of Digital Circuits , 1994 .
[12] Daniel A. Spielman,et al. Exponential algorithmic speedup by a quantum walk , 2002, STOC '03.
[13] R. V. Meter,et al. Layered architecture for quantum computing , 2010, 1010.5022.
[14] Margaret Martonosi,et al. ScaffCC: a framework for compilation and analysis of quantum computing programs , 2014, Conf. Computing Frontiers.
[15] Andrew W. Cross,et al. Transversality Versus Universality for Additive Quantum Codes , 2007, IEEE Transactions on Information Theory.
[16] Andrew W. Cross,et al. A quantum logic array microarchitecture: scalable quantum data movement and computation , 2005, 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05).
[17] Osamu Tatebe,et al. Workflow Scheduling to Minimize Data Movement Using Multi-constraint Graph Partitioning , 2012, 2012 12th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (ccgrid 2012).
[18] Alireza Shafaei,et al. Design of a universal logic block for fault-tolerant realization of any logic operation in trapped-ion quantum circuits , 2014, Quantum Information Processing.
[19] Massoud Pedram,et al. Minimizing the latency of quantum circuits during mapping to the ion-trap circuit fabric , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).