In this chapter, our DTSE methodology is introduced and illustrated on a simple but representative real-life application. The starting point of the DTSE methodology [58, 59] is a system specification with accesses on multi-dimensional (M-D) signals which can be statically ordered (single thread of control). The output is a net-list of memories and address generators (see figure 1.7), combined with a transformed specification where the background memory accesses are heavily reorganized. This new code is the input for the architecture (high-level) synthesis when custom realizations are envisioned, or for the software compilation stage in the case of predefined processors.